In the edge region of vertical power semiconductor components, such as diodes or IGBTs, dynamic effects, caused by free charge carriers may cause a significant reduction of the blocking capability in said edge region with respect to the ideal breakdown voltage and also with respect to the blocking capability of the active region during the turn-off operation. During the turn-off operation, it may happen, on account of the resulting increased charge carrier concentration in the regions of the edge or the drive terminals, that both the electric field strength in the silicon and the field strengths in SiO2 layers or further insulator layers which have been deposited on the silicon surface for the purpose of passivation or field plate formation in the edge region are greatly increased. By virtue of field strength spikes, an avalanche breakdown in the silicon or a breakdown of the oxide or of the insulator layer may occur there.
Instead of p-rings with field plates, it is also possible to use other edge constructions, such as with p-rings without field plates or VLD edges with an electroactive, semi-insulating or else insulating covering individually or in combination also with further edge terminations known per se.
Several approaches are known in the art to produce inhomogeneous Pt concentrations in order to reduce the density of free charge carriers in combination with variants as above. For example, vertically inhomogeneous Pt concentrations can be produced via phosphorous diffused gettering. However, the resulting profiles are laterally constant. Another variant is the deposition of Pt and a subsequent silicidation. A further variant pertains to an implantation over the frontside of the substrate. However, segregation at oxide layer boundaries can occur in that case.
All of the above variants either require dedicated process steps, are prone to failure or are not suitable to produce varying lateral Pt concentrations. In view of the disadvantages of the prior art outlined above and for other reasons, there is a need for the present invention.